Resume CV: Gary Shorthouse


Qualifications and Education:


  • M.Sc. (distinction), Microelectronics (Middlesex University)
  • B.Sc. Chemistry (Bath University)
  • Dip Management Science (Warwick University)
  • Professional courses on Advanced Project Management, Interviewing Skills, Managing Creativity, Financial Management, Quality Management, Proposal writing, EC Proposal Assessment


Key Skills:

  • The ability to quickly assimilate, take on board and apply new information, data and knowledge.
  • Strong technical skills in many aspects of micro/nano-electronics and materials
  • Going all the way - from original idea, feasibility study, research & development, commercialisation and marketing
  • Communicating simple and advanced concepts at various levels through the written and spoken word - from magazine articles to advanced multi-client technical proposals and reports
  • Leading and motivating multidisciplinary teams and organising international technical conferences and consortia


Awards and Publications:

  • Prince of Wales Finalist Award for Innovation
  • IMAPS (International Microelectronics and Packaging Society) Award for Innovation
  • SMART (Small firms' Merit Award for Research and Technology)
  • Author and co-author of over 60 papers, articles, major reports and patents
  • Many journalistic articles for numerous websites and magazines
  • For major publications see annex.


Current activities:

Currently I work as a consultant and freelance writer as both an independent and through my company tCORE Limited.


Career Overview:


Director of tCORE Limited, from 2000

I founded tCORE in 2000 to provide technical, coordination and research services to the electronics industry. Some of the company’s key activities have been:

  • Proposal writing and coordination – working with many European companies and universities to develop European Framework and UK MOD R&D proposals
  • Provision of test and process development services for local electronics companies
  • Research and development on new electronic materials and testing techniques including UK funded projects and as a partner in major European Framework projects (PROCURE, ATHIS)
  • Working with universities and industry in developing research communities and “Networks of Excellence” including: Silicon Futures; SETNET - the Semiconductor Test Network; and EEENET - Electronics for Extreme Environments Network
  • Organising residential electronics and photonics research conferences (PREP)


General Manager of NEMEC Limited – North East Microelectronics Centre: from 1998

NEMEC was a joint project between the Universities of Durham and Newcastle set up primarily to provide advanced semiconductor testing services to Siemens (which had recently set up a large semiconductor fabrication facility in the region) and to provide services to regional SMEs. Unfortunately business model fell apart when, after NEMEC invested £million in a mixed signal tester, Siemens, troubled by loss of memory markets, closed down their facility.

With what could be salvaged from NEMEC I founded tCORE.


Director HITEN (High Temperature Electronics Network), AEA Technology: from 1996

Primary role was to take HITEN, a European funded network, from being publically funded to a self-sustaining business. The model was to commercialise the HITEN website by charging fees to the members for value added services. This involved developing the services and marketing them throughout Europe, in the USA and in Japan.

We enjoyed considerable success and made all sales targets.

Other activities included writing multi-disciplinary multi-collaborative international research proposals including “Reliability Physics and Design Tools for High Operating Temperatures” which was fully funded and was awarded highest possible grade by the European Commission.


Technical Director of KonserQ Limited: from 1993

KonserQ was launched as a joint venture between Johnson Matthey and a venture capital company. The model was to fully develop and take to market a microelectronics interconnection materials and device technology based on patented novel dielectrics and conductors.

The system used an ultra-low permittivity dielectric using nano-porosity to control its properties and was developed by a multi-disciplinary research team I led whilst technical manager at Johnson Matthey.

The technology gained a Prince of Wales Finalist Award for innovation and I received the IMAPS Award for Technical Innovation.

KonserQ was sold to Hereaus in the USA.


Electronics Materials Technology Manager, Johnson Matthey Technology Centre: from 1988

My role was to manage an interdisciplinary electronic materials R&D group of up to 18 graduates and PhDs. I initiated and managed many projects including the development of new thick film materials, interconnection technology, die attachment and electronics packaging, and interconnection and vapour phase epitaxy for GaAs wafers.

The team achieved considerable technical and commercial success and several new products were commercialised. In particular, we developed the high-density interconnection technology for Multi-chip Modules and microwave circuits described above.

I marketed this extensively in Europe and the USA, and worked with a venture capitalist and JM senior management to form the Spin-off Company, KonserQ.

 I also worked with other companies in order to carry out collaborative, European funded research, in particular the Eureka Pepite programme.


Microelectronics Group Leader, ERA Technology Ltd. Leatherhead: from 1983

My primary responsibilities were for initiating, marketing, obtaining funding and running several contract R&D micro-electronics based projects.

Examples of successes were the development of a novel screen printing process which was developed into commercial product, the design and fabrication of strain sensitive silicon test chips, and the development of a novel electronics packaging system based on the use of stress relieving copper substrates and novel glass ceramic materials.

I also set up a clean room and semiconductor processing facility and managed the company’s contribution to a major ALVEY programme.


Laboratory Manager, Microelectronics Centre, Middlesex University: from 1974

Working with a number of technicians and researchers, I organised the installation and running of a large clean-room complex and established the initial semiconductor and thick film manufacturing processes.

I initially joined Middlesex University as a research technician working for my dissertation on SOI (silica on insulator) formed by oxygen ion implantation. During this project I fabricated the first active device on this (then) novel material. I was subsequently promoted to laboratory Manager.

I also worked on developing failure analysis techniques for semiconductor devices for the European Space Agency, including using chemical etches for layer removal and voltage contrast SEM


Research Chemist, John Wyeth Limited: from 1970

As a new graduate I worked as a general synthetic organic chemist on the design and synthesis of novel biologically active compounds.


ANNEX - Major Proposals and Publications 


Major Proposals Written

·       SCALABLE - Secure Adaptable Ambient Assisted Living Environment for Ageing Society, 2007 (Commissioned by ONE North East)

·       VAPORISE - Versatile Application Oriented Infrastructure for Intelligent Building Design, 2006 (Commissioned by ONE North East)

·       SiFutures – Silicon Futures, 2005 (Funded by EPSRC)

·       EEENET – Electronics for Extreme Environments, 2003 (Funded by EPSRC)

·       ATHIS - Advanced Technique for High Temperature System-On-Chip, 2002 (Commissioned by Newcastle University and co-authored with Leuven University)

·       PROCURE, 2002 (Co-authored with Daimler Chrysler)

·       SETNET – Semiconductor Test Network, 2001 (

·       HITEN - High Temperature Electronics Network, 1999

·       REDHOT – Reliability Physics for High Operating Temperatures 1999

·       HOTPOINT - High Operating Temperatures for Packages or Interconnections using New Technologies, 1998


Books and Proceedings

·       Semiconductors for High Temperature Electronics, 1997, ISBN No 7058-1757-1 (Edited and co-authored)

·       World Market for High Temperature Electronics,  HITEN,  1996, (Edited and contributed)

·       Post Graduate Research Conference PREP Proceedings, 2005 (Assembled and edited)

·       Post Graduate Research Conference PREP Proceedings, 2004 (Assembled and edited)

·       Post Graduate Research Conference PREP Proceedings, 2003 (Assembled and edited)



Papers and articles

·       SETNET – Semiconductor Test Network,  presented at CC-VLSI, Banff, Canada 2002

·       Down-Hole Chemical Sensors for Sub-Sea Oil Wells, MST News, September 1998

·       High Temperature Electronics – Applications and Markets, MST News, September 1998

·       A review of European R&D in High Temperature Electronics, HITEC Conference, June 1998, Albuquerque, New Mexico, USA

·       The World Market for High Temperature Electronics, HITEC Conference, June 1996, Albuquerque. New Mexico, USA

·       Multi-Chip Modules Using Etched Gold Conductors and a High Performance Low Permittivity Photosensitive Dielectric, Gold Bulletin 1993, 26(4), pp 127-134

·       Advanced Thick Film Materials for Multi-chip Modules: Processing and Performance, Proc. 9th European Hybrid Microelectronics Conference, Nice, June 1993

·       Inorganic Materials Solution for Multi-Chip Modules and Multi-Layer Hybrids, Proc. ISHM-Nordic Conference, September 1992

·       Inorganic Materials Solution for Multi-Chip Modules and High Speed Multi-Layer Hybrids. Proc. 12'h IEMT Symposium, Mainz-Germany, April 1992

·       Dielectrique de Film Epais, Hermetique, a Basse Permittivite et Haute Resolution, Proc. SEE, Paris May 1992

·       Hermetic Very Low K High Resolution Thick Film Dielectric for High Speed High Density Applications. Proc. 24th International Symposium on Microelectronics, Orlando, Florida October 1991

·       A New Thick Film Materials Technology Based On a Low Permittivity Photosensitive Dielectric and Etched Gold Conductors. Proceedings of the 8'" European Hybrid Microelectronics Conference, Rotterdam, May 1991.

·       High Density, High Speed Thick Film interconnections incorporating a New High Resolution Low Permittivity Dielectric. Proc. 23" International Symposium on Microelectronics, Chicago, 1990

Also presented at:

·       ISHM Northwest, USA, December 1990

·       ISHM San-Diego, USA, January 1991

·       Development of a Low Permittivity Photosensitive Inorganic Dielectric. Proc. ISHM, London, September 1990

·       Materials for High Speed Interconnections. ISHM Southern California, June 1990

·       A Thick Film Solution to High Speed, High Density Multilayer Interconnection. Hybrid Circuit Technology, April 1990

·       Measurement of Stress and Temperature Distribution in Large Area Die. Proc. 8". International Electronic Manufacturing Technology Symposium, Baveno, 1990

·       Precision Printing for High Density Interconnections. Proc. 6". European Microelectronics Conference, Bournemouth, 1987

·       High Thermal Conductivity Copper Packages with Stress Relieving Pillars. Proc. International Electronics Packaging Symposium, Paris 1986

·       Silicon-on-insulator structures using high dose oxygen implantation to form buried oxide films. Microelectronics Journal Vol. 14 No. 6 (1983)

·       Buried oxide layers formed by high dose oxygen ion implantation Proc. Electrochemical Society Meeting, Minneapolis, (May 1981)

·       Epitaxial layers grown on oxygen implanted silicon. Electronic Materials Conference, Colorado (June 1982)

·       Epitaxial layers grown on oxygen implanted silicon J. Electronic Materials, (1983)


Major Commissioned Reports

·       Semiconductors for High Temperature Electronics - HITEN report 1997

·       World Market for High Temperature Electronics - HITEN report 1996

·       The use of Chemical Etching in the failure analysis of semiconductor devices (Parts 1 and 2) – European Space Agency, 1976

·       Silicon on insulator Structures by Oxygen ion Implantation(l978) - MOD (Advanced Computer Technology)

·       Thermal Management of Electronics Systems (1984)- Commissioned by the interconnection Technology Industrial Consortium (ITIC) (1 of 4 chapters)

·       Advanced interconnection - Copper Substrates with stress relieving pillars for Packages - Alvey project 040

·       Precision Printing -MOD Report (AWRE)

·       A Thermal Test Chip - DTI Report

·       A Comparative Evaluation of Alternative Thick Film Conductors (ERA Technology)

·       Copper Thick Film Technology - (ERA Technology)



Patents and Patent Applications

·       Dielectric Paste Compositions (granted – JM/Konserq)

·       Dielectric Green Tape Composition (granted –JM/Konserq)

·       Silver Glass Tape for Die Attachment (abandoned)

·       A Precision Printing Screen (granted – ERA)

·       Thermal and Stress Measurement Test Chip (design copyright)

·       Improved Paste Compositions (granted - JM)

·       Dielectric Powder Composition (granted - JM)

·       High Temperature Soldering (pending)